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OCR GCSE Computer Science

GCSE · OCRComputer Science32 篇笔记 个文件夹,127 KB

cookie 制作的复习笔记,共 32 篇,分为 12 个章节,按照课程主题编排。

Notes for OCR GCSE Computer Science (J277), in folders for each of the specification's topics in its order, from systems architecture and data representation through networks, security, software and the impacts of technology to algorithms, programming, robust programs, Boolean logic and languages. Code is shown in OCR Exam Reference Language with Python where it helps. Follows the specification for exams from 2027 (version 3.1).

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内容

  • Systems architecture
    • The CPU and the fetch-execute cycle4 KB
    • CPU performance and embedded systems4 KB
  • Memory and storage
    • Primary storage and virtual memory4 KB
    • Secondary storage4 KB
  • Data representation
    • Units and file size calculations4 KB
    • Number systems and conversions4 KB
    • Binary addition, overflow and shifts3 KB
    • Character sets3 KB
    • Representing images3 KB
    • Representing sound3 KB
    • Compression3 KB
  • Computer networks, connections and protocols
    • Networks, topologies and the Internet7 KB
    • Wired and wireless connections, and encryption3 KB
    • Addressing, standards, protocols and layers4 KB
  • Network security
    • Threats to computer systems and networks5 KB
    • Identifying and preventing vulnerabilities4 KB
  • Systems software
    • Operating systems and utility software4 KB
  • Ethical, legal, cultural and environmental impacts
    • Impacts of digital technology on society6 KB
    • Legislation and software licences5 KB
  • Algorithms
    • Computational thinking4 KB
    • Designing, creating and refining algorithms5 KB
    • Searching algorithms3 KB
    • Sorting algorithms4 KB
  • Programming fundamentals
    • Variables, operators and control structures5 KB
    • Data types, casting and strings3 KB
    • Arrays and records3 KB
    • Files, random numbers and SQL3 KB
    • Subprograms4 KB
  • Producing robust programs
    • Defensive design4 KB
    • Testing and errors3 KB
  • Boolean logic
    • Logic gates, truth tables and logic diagrams3 KB
  • Programming languages and IDEs
    • Levels of language, translators and IDE tools5 KB

第一篇笔记

Systems architecture / The CPU and the fetch-execute cycle

What the CPU does

The central processing unit (CPU) is the part of a computer that runs programs. A program is a list of instructions held in main memory, and the CPU repeatedly fetches an instruction, works out what it means and carries it out. Everything a computer does, from drawing a web page to playing a game, is done by the CPU carrying out very large numbers of these small instructions one after another.

Components of the CPU

The arithmetic logic unit (ALU) does the calculations and the logical comparisons. Adding two numbers, checking whether one value is greater than another and combining values with AND, OR and NOT all happen in the ALU.

The control unit (CU) directs the rest of the machine. It decodes each instruction, then sends signals that tell the ALU, the registers and memory what to do and when, and it controls the flow of data around the CPU.

Cache is a small amount of very fast memory inside or very close to the CPU. It holds copies of the instructions and data that are used most often, so the CPU does not have to wait for the much slower main memory.

Registers are tiny storage locations inside the CPU, and they are the fastest memory in the computer. Each one holds a single item that the CPU is working on at that moment, and each has a fixed purpose.

The registers in the Von Neumann architecture

The Von Neumann architecture describes a computer in which program instructions and the data they use are stored together in the same main memory, and both are fetched by the CPU in the same way. It is the design used by most general-purpose computers. It includes four special-purpose registers.

RegisterFull nameWhat it holds
PCProgram counterThe address of the next instruction to be fetched
MARMemory address registerThe address in memory that is about to be read from or written to
MDRMemory data registerThe data or instruction that has just been fetched from memory, or that is about to be written to it
ACCAccumulatorThe result of the calculations done by the ALU

The difference between an address and data matters here. The PC and the MAR hold addresses, which say where something is stored. The MDR and the accumulator hold data, which is the content of a location or the result of a calculation. An address such as 1042 says which location to look in, and the value stored in location 1042 might be a completely different number.

The fetch-execute cycle

The CPU carries out each instruction in three stages, which repeat for as long as the computer is running a program. The cycle is also called the fetch-decode-execute cycle.

Fetch
  1. The address in the program counter is copied to the memory address register.
  2. The instruction stored at that address in memory is copied into the memory data register.
  3. The program counter is increased by one, so that it points to the next instruction.

The program counter is increased during the fetch stage, before the instruction has been carried out. That way it is already pointing at the following instruction when the current one finishes, unless a jump instruction changes it.

Decode

The instruction now held in the memory data register is passed to the control unit, which decodes it. Decoding means working out which operation is required (add, load a value, store a value, jump to another instruction) and which data or address it works on.

Execute

The instruction is carried out. Depending on what it is, the ALU may do a calculation and leave the result in the accumulator, a value may be read from or written to memory through the MAR and MDR, or the program counter may be changed so the program continues from a different place. When execution finishes, the cycle starts again with the next fetch.

A worked example

Suppose memory location 20 holds the instruction to add the value stored in location 50 to the accumulator, and the program counter contains 20.

  1. Fetch: 20 is copied from the PC to the MAR, the instruction at address 20 is copied into the MDR, and the PC becomes 21.
  2. Decode: the control unit reads the instruction in the MDR and sees that it is an addition using the contents of location 50.
  3. Execute: 50 is placed in the MAR, the value stored at location 50 is fetched into the MDR, and the ALU adds it to the value in the accumulator.

Next time round, the PC contains 21, so the instruction stored at location 21 is fetched.

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